Apple’s mobile processors

Preface

Apple does not reveal any details about their mobile devices. There are however two valuable sources of information relating to Apple’s SOC’s.

a) A few companies teardown electronic devices, such as smartphones, tablets, etc., i.e. they disassembly these products, identify components and functionality, and publish their results either free of charge or for fees, like Chipworks, Techinsights, Ifixit.

b) In a few cases even Apple reveals data for optimizing compiler operation, as in case of the Cyclone core used in their A7/A8/A8X processors. The information included in this chapter originates in most parts from these sources.

Remark

Throughout this chapter the designations of application processor, processor and SOC are used as synonyms.

1. Overview of Apple’s mobile processors

1. Overview of Apple’s mobile processors Main features of Apple’s early iPhones-1

Main features of Apple’s early iPhones-2

Main features of Apple’s early iPads -1

Main features of Apple’s early iPads -2

Main features of Apple’s 32-bit application processors used in their mobiles (1)

Main features of Apple’s 32-bit application processors used in their mobiles (2)

Main features of Apple’s 64-bit application processors used in their mobiles (1)

Main features of Apple’s 64-bit application processors used in their mobiles (2)

Note that the X-taged processors, like A6X, A8X, A9X are primaryly targeting tablets, whereas those without the X tag are primarily smartphones.

2. Apple’s original iPhone

Designated also as the iPhone 2G.

Introduced in 1/2007 by Steve Jobs at the McWorld Expo

Figure: Steve Jobs introducing the iPhone at MacWorld Expo in 1/2007 The iPhone became available in 6/2007 in the US and later elsewhere.

Remarks

• PoPs are fabricated as Multi-Chip Packages (MCPs).

• MCP became standardized by JEDEC about 2006 (JC-63).

• First PoPs emerged in cell phones around 2004 [13].

• First generation PoP technology typically integrates the baseband or application processor with one or two memory dies, as indicated in the next Figure.

Figure: Possible PoP structure for implementing a baseband or application processor and two memory dies

• According to this, using PoP packaging for integrating the application processor and the memory in Apple’s original iPhone was an early advanced packaging solution.

The ARM1176JZF-S CPU

• The 32-bit CPU runs at a lower clock rate (412 MHz) than possible (667 MHz) to save power.

• It supports the ARMv6 ISA.

• It is a single issue processor.

• It has 16 kB instruction and 16 kB data caches, but no L2 cache.

• It has a Vector FP Processing Unit (VFP).

The PowerVR MBX Lite 3D graphics accelerator

Figure: Generations of PowerVR graphics IPs (from Imagination Technologies)

The iPhone board (one side)

The iPhone board (the other side)

3. Apple A6 with dual Swift cores

Remarks to the development of the A6

• In 4/2008 Apple acquired PA Semi, a CPU design firm that had experience in developing high performance PowerPC processors. Previously, some of the team even took part also in the design of the low-power StrongArm processor, at Digital Equipment Corporation.

• About this time Apple also signed a licensing agreement with ARM to be able to implement ARM compatible processors.

• One group of the PA Semi employees set to work on the Apple A4, based on the ARM Cortex A8 core whereas the other group began to define the microarchitecture of the A6 core, designated as Swift.

• In early 2010 the team completed the logical design of the microarchitecture of the A6 core and started with the physical design phase